MOS管电路阈值电压附近的特性解析

The characteristic near the threshold at which the channel current changes from the pinch-off state to the on state is very important for the complementary MOS circuit described later, so I will not explain it here.

From equation (1.23), it can be seen that if the charge surface density induced by the gate voltage on the silicon surface is Qs (ψs), if the charge generated by the impurity ions contained in the substrate is ignored, then

Use this formula to define three threshold voltages VFB, V1 and VT. VFB is the flat band υoltage, which is the gate voltage when ψs=0. Since Qs(0)=0 when ψs=0, VFB can be simply written as

V1 is the gate voltage when the silicon surface is just in the intrinsic state, and ψb is recorded as the Fermi potential inside the silicon substrate, then V1 can be obtained by ψs=ψb, which is called the intrinsic voltage (intrin-sic υoltage). VT is commonly referred to as the threshold voltage (threshold υoltage), which is ψs=ψb, that is, the gate voltage when the induced minority carrier density is equal to the majority carrier density in the substrate. At this time, a so-called inversion layer is formed on the silicon surface, a channel is formed, and current starts to flow.

When the gate voltage is between VFB and V1, because of the formation of a depletion layer on the silicon surface, it can be considered that there is almost no current flow between the drain and the source, but when the gate voltage is between V1 and VT, due to the induction on the silicon surface Some minority carriers, although the number is very small, there is still current flowing between the drain and the source. This must be noted.

This kind of current circulates at a gate voltage below the commonly defined threshold voltage, and is often referred to as leakage current. In actual devices, in addition to the leakage current caused by this reason, there is also the leakage current at the leakage PN junction.

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