The actual circuit diagram of Figure 6.1-1 is shown in Figure 6.1-4. The op amp A1 and M2 form a negative feedback loop that converts the input voltage image.png into a current I, which is equal to image.png/R. Therefore, this circuit is a voltage controlled (voltage controlled) oscillator. It can be seen from the figure that the current of M4, M5, M6 and M7 is equal to the current I of M3. When M9 is on and M8 is stopped, M1 and M5 form a current source circuit, so the current of M1 is I; when M10 is on, M11 is off. When, M2 and M7 form a current source, and the current of M2 is also equal to I. Obviously, the current of M1 is controlled by M9 and M8, the current of M2 is controlled by M10 and M11, and the working conditions of M5~M11 depend on the level of the output voltage Vo of the operational amplifier A2. Multivibrator circuit. When the Vo voltage is high level VDD, M9 is turned on, M8 is turned off, and the current of M1 is equal to the current I of M5. At the same time, M10 is turned off, M11 is turned on, and the pole voltage of M2 is equal to Vss, so that M2 is turned off. Therefore, when Vo=VDD, the current I charges the capacitor C through the M1 tube, and the voltage V1 rises. When it rises to VDDR1/(R1+R2), the output voltage Vo of A2 changes from VDD to VSS. At this time, the gate potential of M1 Equal to the VDD voltage, so that M1 is cut off. At the same time, M10 is turned on and M11 is turned off, so that M2 is turned on, and its current is equal to the current I of M7. The capacitor C is discharged through M2, and the voltage of V1 drops. When it drops to VssR1/(R1+R2), the voltage of Vo changes to VDD. The oscillating frequency expression of this circuit is the same as (6.1-3), namely
For VDD=-Vss, the above formula is written as
It can be seen from the above formula that the oscillation frequency f has a linear relationship with the input voltage Vin, so the circuit in Figure 6.1-4 is a voltage-controlled oscillator. This circuit can be used to achieve voltage to rate conversion.
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