Analysis of Instantaneous Phase Response and Set-up Time of CMOS Operational Amplifier

When t≥Ts, the operational amplifier enters a linear amplification state, and the closed-loop transfer function is obtained from Figure 3.3-2:

where

By (3.3-17) the pole of the closed-loop amplifier is

Obviously, the pole distribution is related to the damping coefficient ξ, so the settling timealso related.

From (3.3-19) and (3.3-21) formulas, we get

when 1, the compensation capacitor Cc has the following relationship,

Using the initial conditions of equation (3.3-10) and equation (3.3-17), the setup time for different ξ values can be obtained(For detailed derivation, please refer to literature [13]).

1. ξ<1 (with overshoot)

The first term of formula (3.3-27) represents the conversion time, and the second term represents the setup time of the linear working area. If δ=0.001, the equations (3.3-26) and (3.3-27) can be written as

2、=1（Critical damping）

The establishment time image.png of the above formula can be obtained by graphical method.

3、〉1（Over damping）

It can be seen from the above discussion that to shorten the settling time TSST, the unity gain bandwidth (GB=Avoω1) and the high-frequency pole frequency ω2 of the op amp should be increased, and the dynamic range of the input stage (Io/gm1) should be expanded.

In order to obtain a shorter settling time, the damping coefficient ξ is less than 1, usually 0.6 to 0.9. Now perform transient analysis on the CMOS operational amplifier circuit shown in Figure 3.3-3.

The main parameters in the figure are shown in Table 3.3-1. The width-to-length ratio of each tube is shown in Table 3.3-2.

Connect Figure 3.3-3 as a follower, the input voltage isFor the voltage step signal, according to the data in Figure 3.3-3, Table 3.3-1 and equations (3.3-23) and (3.3-27), the settling time TSST when ξ=0.001 can be obtained;

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