Introduction to transient response principles and parameters of CMOS operational amplifiers

Source: Time:2021-1-15

Introduction to transient response principles and parameters of CMOS operational amplifiers

The frequency characteristics of the CMOS op amp discussed refer to the rate response when working in a small signal. It is usually described by a small signal (sine signal), but in fact, the signal processed by the op amp is rarely a sine signal, usually an order Jump signal, and the response of the op amp cannot be simply described by frequency, but the conversion rate SR and settling time of the op ampimage.pngto show that these two parameters are the main parameters of the transient response of the op amp.

Usually the conversion rate SR and settling time of the op ampimage.png it is measured under the condition that the closed-loop gain of the op amp is 1 and connected in the form of a follower (see Figure 3.3-1a). Transient response of CMOS op amp. The so-called slew rate SR of the op amp refers to the maximum change rate of the output signal Vo(t) when the closed-loop gain is 1, a step large signal (less than the maximum input common-mode voltage of the op amp), and its unit is volts/microsecond.


According to the definition, the conversion rate SR is

CMOS运放的瞬态响应

Establishment timeimage.pngit refers to the time required for the closed-loop gain to be 1 from the moment of input of a large step signal until the output amplitude reaches a certain accuracy range. The higher the accuracy, the longer the settling time. The setup time of the op amp is shown in Figure 3.3-1b. In the figure, V is the step amplitude of the input signal;image.pngFor the required accuracy, usuallyimage.pngtake 0.1%; Ts is the conversion time, during which the amplitude of the output amplitude change is the conversion rate SR; TSL is the linear region establishment time;image.pngis the establishment time, its valueimage.pngCMOS运放的瞬态响应

CMOS运放的瞬态响应

It can be seen from the figure that the settling time of the op amp is composed of two parts, one is the conversion time Ts, and the other is the output amplitude of the op amp after entering the linear region to reach a certain accuracy range(image.png)the time required for TSL. Here are some brief explanations, when a large price jump signal is input, the output voltage of the op amp is too late to change, and the negative feedback signal is zero, so the input signal is all added to the input of the op amp, so the op amp input stage (differential amplifier) In the limiting state (that is, entering the non-linear state). Transient response of CMOS op amp. At this time, the change of the output signal of the circuit has nothing to do with the input signal. It is determined by the charging current of the compensation capacitor Cc in the op amp circuit, which is determined by the slew rate SR of the op amp. As the output amplitude increases, the input is input to the op amp input The amplitude of the stage gradually decreases. When it is reduced to the limit level of the input stage of the op amp, the op amp enters a linear state. The settling time of the CMOS op amp is calculated quantitatively below.image.pngthe relationship with the frequency response of the op amp.

From the discussion in the first section, we can see that the frequency characteristic of CMOS operational amplifier is

CMOS运放的瞬态响应

Where ω1 is the main pole frequency

CMOS运放的瞬态响应

cWhere ω1 is the main pole frequency

CMOS运放的瞬态响应

ifimage.png,but

CMOS运放的瞬态响应

And Cc is the compensation capacitor, and CL is the load capacitance at the output of the op amp

CMOS运放的瞬态响应

In order to improve the stability and eliminate the zero point, the formula (3.3-2) can be written as

CMOS运放的瞬态响应

Where Avo is the DC gain of the op amp, Avo=gm1gm2R1R2.


According to the discussion of the limiting characteristics of the differential amplifier in Chapter 2, the limiting level of the input stage of the op amp is approximately

CMOS运放的瞬态响应

In the type, Io is the working current of the input stage, and gm1 is the transconductance of the input stage amplifier.


From the above, the closed-loop gain is 1 condition, and the model for analyzing the transient response of the operational amplifier is shown in Figure 3.3-2.

CMOS运放的瞬态响应

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