Detailed explanation of the bias circuit based on the transistor VBE voltage

The bias circuit based on VBE is shown in Figure 2.7-3, where the PnP transistor Q1 and the CMOS tube are formed at the same time.

The feedback loop formed by M1~M4 forces the current flowing through the Q1 tube to be the same as the current flowing through the resistor R. From the figure, the following relationship can be obtained

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This formula shows that the bias circuit in Figure 2.7-3 also has a large negative temperature coefficient.

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