The typical structure of a MOS field-effect transistor made by a planar process is shown in Figure 1.1-2. The substrate material is a p-type semiconductor, and two n The + area is formed by a diffusion process and is called the source area and the drain area respectively. The metal electrode above the gate oxide layer is called the gate. The area under the gate oxide layer and between the source and drain is usually called the channel region. The source and drain regions are respectively formed by metal ohmic contacts to form an S plate and a D pole. The working principle of MOS field effect tube. The electrode drawn from the substrate is called B. Usually, B and the source are shorted and grounded, but sometimes a reverse bias voltage is applied between the source n+ and the substrate B. At this time, its characteristics are the same as S and B are short-circuited differently, and the specific impact will be discussed in the following sections.
The tube shown in Figure 1.1-2 is called an n-channel (n-channel for short) enhanced MOS field effect transistor, and its cross-sectional view is shown in Figure 1.1-3. Its characteristic is that when no voltage is applied to the gate, there is no n-type conductive channel under the gate oxide layer, only when a positive voltage is applied to the gate (VT is called threshold voltage, which will be discussed in detail below), a conductive n-channel is formed on the surface of the P-type material between the source and drain. Connect the source and drain regions of the same conductivity type.
Now qualitatively discuss the working principle of the n-channel enhancement mode MOS transistor (when the source is shorted to the substrate and grounded). When the gate is connected to zero potential, the source region to the drain region is a n+-pn+ structure. At this time, if a positive voltage is applied to the drain, the drain region The Pn junction with the substrate is in a reverse biased state, so no current flows between the source and the drain (only a small reverse current flows). The working principle of MOS field effect tube. If a positive potential VGS is added to the gate, a part of the voltage will drop on the SiO2 layer, and another part of the voltage will drop on the surface of the P-type semiconductor. A surface potential directed to the inside of the semiconductor is formed, so that the surface of the P-type semiconductor is depleted, even inverted. When , the surface of the P-type semiconductor is strongly inverted, forming n The channel connects the source and drain regions of n+. At this time, if a positive voltage is applied to the drain, a current IDS flows between the source and the drain. IDS changes with VGS, that is, changes with the electric field on the semiconductor surface. This is the so-called surface field effect, the name of the field effect transistor. That's where it came from. In Figure 1.1-2, W is the channel width, L is the channel length,
is the thickness of the oxide layer. From the discussion below, these parameters will directly affect the electrical performance of the MOS field effect tube.
Related information
The basic principles and characteristics of MOS field effect transistors
The type of MOS field effect transistor
Characteristic curve of MOS field effect tube
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