Detailed explanation and analysis of VMOS process structure and characteristics

With the increasing development of MOS large-scale integrated circuits and very large-scale integrated circuits, how to further reduce the size of the devices in the circuit and increase the working speed of the circuit, Become an important subject. The general planar MOS process has encountered difficulties in this respect. For example, the channel length cannot be too short, because on the one hand, it is limited by the accuracy of photolithography, and on the other hand, it is limited by the short channel effect of the device itself. In the late 1970s, vertical VMOS devices developed by people could completely overcome the above-mentioned difficulties. This is a three-dimensional device, the channel length can be shortened to about 1um without short channel effects. Both frequency characteristics and power characteristics are comparable to bipolar transistors. VMOS process structure and characteristics. Therefore, VMOS technology is a new processing technology for the development of high-frequency and high-power MOS transistors or large-scale ultra-large-scale integrated circuits.

1. VMOS structure and characteristics

Figure 6-25 shows the structure of the VMOS transistor. It uses highly doped N⁺ silicon as the substrate (as drain D); grow a layer of N ^{on the N+ substrate -}The epitaxial layer, and then on the N^- layer The surface is expanded into impurity boron to form the P-type layer of the substrate; then phosphorus is diffused to form the source region; finally, an anisotropic etching method is used to make a V-shaped groove that penetrates the source region and the substrate to the epitaxial layer, and in the groove A thin oxide layer is grown on top, and aluminum or polysilicon is deposited to form a gate.

From the above structure diagram, we can see that VMOS devices have unique characteristics that planar MOS transistors do not have.

(1) High drain-source withstand voltage

Because of the use of high resistance rate epitaxial layer, both It can increase the breakdown voltage of the device and reduce the gate-drain capacitance.

(2) Large current capacity

Use low resistance N⁺-Si madeThe substrate, the vertical conductivity is formed between the source and drain, so that the device has high current density and low The saturation pressure drop. VMOS process structure and characteristics. Compared with ordinary planar MOS crystaltube, the current capacity can be at least doubled.

(3) The electrode configuration is reasonable

The source, drain, and gate electrodes of ordinary planar MOS transistors are all made on the same side of the silicon chip, which increases the complexity of wiring, and the drain of VMOS is located On the back of the silicon wafer, the current flows longitudinally, which increases the rationality of the wiring.

(4) Short channelization is realized

The channel length L is determined by the difference between the junction depth of the P zone and the junction depth of the N⁺ zone, so L can be made very small. In addition, the VT of the VMOS transistor can be controlled by the concentration of the flipped diffusion region.

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