Detailed analysis of the working principle and design considerations of MOS J-K tube trigger

The working principle of MOS J-K trigger

On the basis of the above-mentioned master-slave R-S flip-flop, some improvements are made to form the J-K full flip-flop as shown in Figure 3-7. MOS J-K tube trigger

J-K triggers also include master triggers and slave triggers, but they are different from general R-S master-slave triggers. Its characteristics are: from the two output terminals of the trigger Q and , respectively refer back to the grid of the tube, and change it from the original The S terminal of the RS flip-flop is changed to the J input terminal, and the R input terminal is changed to the K input terminal. Therefore, in the J-K flip-flop, not only the slave flip-flop must be controlled by the master flip-flop, but the master flip-flop must also be controlled by the slave flip-flop. After the improvement of the MOS J-K tube flip-flop, the J-K flip-flop has a more complete logic function than the R-S flip-flop. The working principle of it is discussed further below.

When the clock pulse changes from "1" to "0 "(Ie changes from "0" to "1") , The state of the main flip-flop remains unchanged, from the flip-flop to the same state as the main flip-flop. When the clock pulse changes from "0" to "1", The state of the slave trigger is unchanged. The state changes of the master slave flip-flops can be divided into the following four different situations to discuss (see Figure 3-7 (a) truth table).

① Both input terminals of J and K are "0". At this time all ends, and the output terminal and The channel to the ground is cut off, so the state of the main trigger remains unchanged. MOS JK tube trigger, when the clock pulse changes from "1" To "0", the state of the slave flip-flop is also unchanged. For example, the original status is "0" (both the master trigger and the slave trigger are "0"), when , the "0" of the master trigger is passed to the slave trigger, so the status of the slave trigger is still "0".

② Both input terminals of J and k are "1". At this time, is all on. Since the gate of is connected to the output of the trigger and , so there is always one on. If the original status is "0", that is, , then until, is on. When the clock pulse changes from "0" to "1", is on. So all the way through, and There is no connection all the way. In this way, one output terminal of the conduction changes from "1" To "0", changes from "0" to "1" , The main flip-flop has completed a flip. When the clock pulse changes from "1" to "0", The slave flip-flop also flips once.

③. At this time is due, is on, which can be analyzed in two cases. If the original master trigger is in the "1" state, the slave trigger is also in the "1" state, so that is closed and is turned on, So and The channels from mine to ground are all disconnected. When the clock pulse changes from "0" to "1", the main trigger The device maintains the "1" state; if the original master trigger is in the "0" state, and the slave trigger is also in the "0" state, then is on, and is up. When the clock pulse changes from "0" to "1", All the way to ground is turned on, so that the main flip-flop becomes "1" state. In short, no matter what the original state is, the clock pulse is changed from "0 After "becomes "1", the master flip-flop will be in the "1" state. When the clock pulse changes from "1" to "0", the slave flip-flop will also change to the "1" state.

④. According to similar analysis, no matter what state the trigger is in, the clock pulse After changing from "0" to "1", the main trigger will be in the "0" state.

Figure 8-8 is the waveform of the JK trigger, in the figure and represents the output level (ie from the trigger Output level), in order to understand, an output terminal of the main trigger is also drawn. MOS JK tube trigger, as can be seen from the figure, the slave trigger always changes with the main trigger, but there is a delay in time, because the change of the main trigger occurs in changes from "0" to "1", and the change from the trigger occurs in changes from "1" to "0".

Master-slave RS flip-flop When the input terminals R and S are both "1", its output state is uncertain, and JK triggers overcome this shortcoming, no matter what is in the input terminals J and K areas For this level, its output state is determined. The function of J-K flip-flop is relatively complete, so it has a wide range of uses. For example, when the input terminals J and K are both "1", the flip-flop flips once, so it can be used as a counter.

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